(1) Field of the Invention
The present invention relates to a semiconductor input protective device, and more particularly to a semiconductor input protective device for protecting internal circuits against an abnormal voltage (hereinafter referred to as a "surge voltage") externally applied to a signal line.
(2) Description of the Related Art
A conventional semiconductor input protective device has CMOS semiconductor device, of the kind to which the present invention relates, is shown in FIG. 1A. As shown therein, the semiconductor input protective device is constituted by an N-channel MOS transistor M1 having a drain (an N-type diffusion layer 103-1) connected to a signal line 8 which is in turn connected to a pad 9, a source (an N-type diffusion layer 103-2) and a gate electrode 5N both connected to a ground line 6, and a P-channel MOS transistor M2 having a drain (a P-type diffusion layer 102-2) connected to the signal line 8, a source (a P-type diffusion layer 102-1) and a gate electrode 5P both connected to a power source line 7. FIG. 1B is an equivalent circuit diagram of the above semiconductor input protective device.
The above conventional input protective device operates as follows. When a surge voltage positive with respect to the ground line 6 is applied to the signal line 8, the surge voltage is released or discharged to the ground line 6 by the lateral NPN bipolar action of the N-channel MOS transistor M1 and, when a negative surge voltage is applied to the signal line 8, a parasitic PN-diode D1 existing between the drain 103-1 of the MOS transistor M1 and a P-type silicon substrate 1 is forwardly biased, so that the surge voltage can be released to the ground line 6.
Similarly, when a surge voltage positive with respect to the power source line 7 is applied to the signal line 8, a parasitic PN-diode D2 existing between the drain 102-2 of the P-channel MOS transistor M2 and an N-well 10 is forwardly biased, so that the surge voltage can be released to the power source line 7. On the other hand, when a negative surge voltage is applied to the signal line 8, the surge voltage can be released to the power source line 7 due to a drain breakdown of the P-channel MOS transistor M2.
The MOS semiconductor device used in the above conventional semiconductor input protective device normally has a gate oxide film the thickness of which is the same as that in the MOS semiconductor device of an internal circuit. Therefore, assuming that, for example, the thickness of the gate oxide film is 10 nm, the operating voltage is 3.3 V and the input signal has a TTL (Transistor-Transistor-Logic) level of 5 V, the gate oxide film 11 of the protective MOS semiconductor device will be subjected constantly to an electric field at a maximum of 5.5 MV/cm, thereby allowing the flow of the tunnel current (Fowler-Nordheim current) through the semiconductor device concerned. This state constantly continues during the operation of the semiconductor device, so that the gate oxide film gradually deteriorates, thereby leading eventually to insulation breakdown and to the inability of the MOS semiconductor device to function as a protective device. This is one of the problems in the conventional semiconductor input protective device which is to be solved by the present invention.